Yes, for sure. The computer industry as a whole seems relentlessly mindful of power consumption but the processor manufacturers particularly so. They seem to throttle designs or radically rework chip topologies to avoid simply increasing performance by increasing power. Portable devices have driven a lot of that, obviously, but I think we *could* have gotten a gradual increase in power consumption over the years instead of or in conjunction with die shrinkage but that really hasn't happened except where truly necessary (a few products here and there notwithstanding).
Anyway, I only later realized which forum this is. You probably started this thread to discuss PSU topology theory directly related to the relationship between complexity and efficiency so my apologies for any drift my posts encouraged. As a non-engineer, I have virtually nothing directly relevant to contribute to that conversation!