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Thread: Sirfa's Hold-up time tricks

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    Default Sirfa's Hold-up time tricks

    Recently I tested two PSUs from Sirfa (HPM platform) which although had pretty small bulk caps for their capacity, still the hold-up time was among the highest that I have ever measured. I should state here that I measure the AC loss to PWR_OK hold-up time which is easier to measure and on top of that the results are crystal clear. However given the two Sirfa made units that troubled me, I decided to make some changes in my methodology.

    Normally the PWR_OK signal drops while the DC voltages are within 5% from their nominal voltages but in this case this signal dropped while the voltage at +12V was 10.24V, way below the minimum which is 11.4V. This means that they don't meet ATX spec's requirements and with this trick the AC loss to PWR_OK hold-up time goes well above 16 ms which is the minimum allowed time.



    This is the time (hold-up time) from AC loss to the moment that the +12V rail goes out of ATX spec (11.36V since my scope doesn't have better resolution to make it 11.4 V exactly). As you can see the hold up time (ΔX) is only 9.2 ms while it should be >=17 ms.


    Here is the difference between the AC loss to PWR_OK hold-up time and the actual hold-up time, which is 15 ms!! Normally the PWR_OK signal should drop BEFORE the rails go out of spec but in this case it drops much after. This means that the PSU will continue to feed your system's precious components with very low voltages and in some cases this can be proved catastrophic.


    Here is the timing scheme of ATX spec. As you can see the PWR_OK signal much drop before the rails go out of spec.

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    OMG
    Have you spotted this behaviour only at Sirfa's PSUs?
    Do you think that there might be other suspects as well?
    CPU:Athlon 64 FX60 (2-cores) 2,6GHz
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    I told ya! This is the very reason I decided to measure voltage hold-up time from the very beggining.

    Because looking at UVP capabilities of ALL the supervisor ICs I have seen so far, I did not believe for a second those things to stop sending PWR Good signal if it falls from 5 % regulation. Good that you learned that ;-)

    In theory, there are both figures in the ATX spec so both should be measured, but some rail has to ALWAYS get under the minimum and only AFTER that the monitor will react. It has some react time. So it only makes sense to measure the +12 V rail directly, this is by far the most important one anyway. In the DC-DC'ed units it will somewhat from the definition fall under minimum always as the first rail, right ;-)

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    Quote Originally Posted by sith'ari View Post
    OMG
    Have you spotted this behaviour only at Sirfa's PSUs?
    Do you think that there might be other suspects as well?
    I suspected these units because with such low capacity caps still they had over 20 ms hold-up. There might be some other units out there doing the same but in any case NOT in this degree. Else I would have changed my methodology much earlier. 1-2 ms can be in the margin of error of equipment either-way but over 10 ms definitely isn't

    Now my expensive two channel scope moved on the dissasembly test bench and a four channel one took its place. This way I will measure both hold-up times and the AC line. In the end I will need a whole month's work for every PSU review Like I do in NAS.
    Last edited by crmaris; 12-10-2015 at 01:58 PM.

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    Yeap, life of PSU reviewer is hard.

    I already fear how much time it will take for me when I finally start measuring the noise in a silent box. I will have to do that in different building…so that carrying the units here and there…and I am already thinking about making a hot box Or jumping on the UPSes for that matter

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    Quote Originally Posted by Behemot View Post
    Yeap, life of PSU reviewer is hard.

    I already fear how much time it will take for me when I finally start measuring the noise in a silent box. I will have to do that in different building…so that carrying the units here and there…and I am already thinking about making a hot box Or jumping on the UPSes for that matter
    You should decorate the hotbox with the infamous sweater

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    Quote Originally Posted by crmaris View Post
    ... Normally the PWR_OK signal should drop BEFORE the rails go out of spec but in this case it drops much after. This means that the PSU will continue to feed your system's precious components with very low voltages and in some cases this can be proved catastrophic ...
    What a brown nasty trick.

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    Default

    This is not a Sirfa only problem, I'm affraid.

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    Default

    Quote Originally Posted by crmaris View Post
    Recently I tested two PSUs from Sirfa (HPM platform) which although had pretty small bulk caps for their capacity, still the hold-up time was among the highest that I have ever measured. I should state here that I measure the AC loss to PWR_OK hold-up time which is easier to measure and on top of that the results are crystal clear. However given the two Sirfa made units that troubled me, I decided to make some changes in my methodology.

    Normally the PWR_OK signal drops while the DC voltages are within 5% from their nominal voltages but in this case this signal dropped while the voltage at +12V was 10.24V, way below the minimum which is 11.4V. This means that they don't meet ATX spec's requirements and with this trick the AC loss to PWR_OK hold-up time goes well above 16 ms which is the minimum allowed time.
    Let me guess:
    those units use a cheapass 8pin protection IC.

    I really don't understand why you are all OK with those dangerous shit that doesn't do its job: protecting the PSU...

    Especially those ones without OCP on +5V and +3,3V on a group regulated unit.

    Or something like the EVGA GS series on witch the VRM modules burn when overloaded because no OCP...
    As long as most reviewers are OK with shitty protection chips, nothing will change...

    A PSU should never be damaged with a normal load!
    A PSU should never damage anything with 'normal' load!

    That's what those protection circuits should be for!
    They should switch the PSU of before either it damages itself or it damages the components with way out of spec voltages and ripple/noise (like 14V on +12V with 500mV Ripple/Noise)...

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    Default

    I would like to point out that this actually is not a problem. Actually some units PWR Good signal reacting sooner than voltage drops under ATX minimum is more like abnormal situation. Often the difference may be too small to bother with but it exists.

    Even ATX specs the PWR Good hold-up time to be longer than voltage hold-up time - obviously, the monitor usually reacts to the voltage state. Now there may be some which react to the actual state of primary side/PFC by soem interconnect. But most easily you just let the supervisor do its job, which means it watching the voltage. Now only AFTER the voltage sunks the supervisor takes action, and it is ALWAYS with some delay.

    This makes complete sense. I told crmaris this exact thing months ago when I was thinking my HUT methodology. Now you all do like it is something extraordinary - NO, it is completelly natural. According to ATX spec, you should measure both. I opted for the most important, because some motherboards even ignore PWR Good signal anyway. Crmaris continued with his measurement of PWRG betting on something I told him already may not be the way he thinks it is (and which does not make even any theoretical sense).

    There are no "tricks" or other stuff going on which you would describe using pejorative words. Simply, the secondary monitor is cheap junk. Now they all are if you ask me since their UVP and OVP capabilities are just so poor, every single one of them. It is more like miracle they ever kick in fast enough…

    Stefan Payne: those multiple-input supervisors are nothing better, they just have couple extra inputs to watch other things, most often current using resistor/inductor shunts.

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